ARM microprocessor mnemonic instructions and their functional description

The instruction set of the ARM microprocessor is load/store type, that is, the instruction set can only process the data in the register, and the processing result is put back into the register, and the access to the system memory needs to be specifically loaded/stored. Instructions to complete.

The instruction set of ARM microprocessor can be divided into six categories: jump instruction, data processing instruction, program status register (PSR) processing instruction, load/store instruction, coprocessor instruction and exception generation instruction. The specific instructions and functions are as follows. Table 3-1 shows (the instructions in the table are basic ARM instructions, excluding derived ARM instructions).

ARM mnemonic instructions and their functional descriptions:

ADC with carry addition instruction

ADD addition instruction

AND logic and instructions

B jump instruction

BIC bit clear instruction

BL with the jump instruction returned

BLX jump instruction with return and status switching

BX jump instruction with state switching

CDP coprocessor data manipulation instruction

CMN compares inverse instructions

CMP comparison instruction

EOR XOR instruction

LDC memory to coprocessor data transfer instructions

LDM loads multiple register instructions

LDR memory to register data transfer instruction

MCR data transfer instruction from ARM register to coprocessor register

MLA multiply-accumulate instruction

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