Verilog-based PS/2 interface control program

1. Main Content of the Example

This example demonstrates how to control the keyboard, LCD, and RS-232 interface on the Red Hurricane II Xilinx development board using Verilog programming. The system is designed to capture input from a PS/2 keyboard and display it either on the onboard LCD or through the RS-232 port to a PC connected via HyperTerminal. This provides a practical way to interact with hardware using digital logic design.

2. Example Objective

The goal of this example is for the reader to gain hands-on experience in the following areas:

  • Understanding the PS/2 interface protocol.
  • Learning how a keyboard works at the hardware level.
  • Writing a Verilog program that reads data from a PS/2 keyboard.
  • Implementing the communication between the keyboard and the development board.
Principle Introduction

The PS/2 interface uses a two-way synchronous serial communication protocol. Data is transmitted one bit at a time over the data line, synchronized by the clock signal. Each bit is sampled on the falling edge of the clock pulse. The host (in this case, the FPGA) has priority over the bus and can interrupt the keyboard by pulling the clock line low at any time.

To implement this in Verilog, we first need to understand the structure and pin functions of the PS/2 interface. Table 1 shows the pin definitions for the PS/2 port.

Table 1: PS/2 Port Structure and Pin Definition

PS/2 Port Structure

As shown, the PS/2 port only has one data line. To distinguish multiple keys, the keyboard uses scan codes. These are unique codes sent when a key is pressed or released. There are two types of scan codes: "make codes" for key presses and "break codes" for key releases. Some keys also use extended scan codes, which begin with an "E0" prefix.

When a key is pressed, the keyboard sends a make code. When the key is released, a break code is sent. For extended keys, the break code starts with "E0F0". This helps the host identify the exact key being used.

Each keyboard transmission consists of 11 bits: one start bit (0), eight data bits (LSB to MSB), one parity bit, and one stop bit (1). This is illustrated in Figure 2.

PS/2 Serial Protocol

Figure 2: PS/2 Serial Protocol

Detailed Example

Here is a step-by-step guide to implementing the PS/2 keyboard interface in Verilog:

  1. Launch the ISE software.
  2. Create a new project and set up the necessary files.
  3. Write the Verilog code that implements the PS/2 serial protocol, based on the timing diagram in Figure 2.
  4. Add the design inputs to the project and connect the interface signals properly.
  5. Set device and pin constraints according to the development board’s specifications.
  6. Download the design to the FPGA and test it by connecting a PS/2 keyboard.

Once the program is running, the characters typed on the keyboard will be displayed on the LCD screen of the development board. Alternatively, the same input can be sent through the RS-232 interface to a PC, where it appears in HyperTerminal. This example offers a clear understanding of how to interface external devices with an FPGA using Verilog.

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